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Underpinning Power Electronics switch optimisation Theme

Reference Number
EP/R00448X/1
Title
Underpinning Power Electronics switch optimisation Theme
Status
Completed
Energy Categories
Other Power and Storage Technologies(Electricity transmission and distribution)
Research Types
Basic and strategic applied research
Science and Technology Fields
ENGINEERING AND TECHNOLOGY (Electrical and Electronic Engineering)
UKERC Cross Cutting Characterisation
Not Cross-cutting
Principal Investigator
Dr PM Gammon
School of Engineering
University of Warwick
Award Type
Standard
Funding Source
EPSRC
Start Date
01 January 2018
End Date
31 December 2020
Duration
36 months
Total Grant Value
£1,194,288
Industrial Sectors
Info. & commun. Technol.
Region
West Midlands
Programme
NC : ICT
Investigators
Principal Investigator
Dr PM Gammon, School of Engineering, University of Warwick
Other Investigator
Dr N N Lophitis, Ins for Future Transport & Cities, Coventry University
Professor P Mawby, School of Engineering, University of Warwick
Dr RA McMahon, Engineering, University of Cambridge
Professor A O'Neill, Electrical, Electronic & Computer Eng, Newcastle University
Professor F Udrea, Engineering, University of Cambridge
Professor NG Wright, Electrical, Electronic & Computer Eng, Newcastle University
Industrial Collaborator
Project Contact, Dynex Semiconductor Ltd
Project Contact, Siemens plc (UK)
Web Site
Objectives
Abstract
Silicon carbide (SiC) N-channel IGBTs have the potential to enable new and highly efficient ultrahigh voltage (10 kV+) applications such as the Smart Grid and HVDC, enabling a low carbon society. However, to date, only four research groups have reported on their successful development, due to the considerable challenge associated with their fabrication. Exploiting a consortium made up of experts from the fields of SiC materials, simulation and fabrication, and building on a recent history of SiC MOSFET, Si IGBT and SiC materials research, the aim of the Switch Optimisation theme of Underpinning Power Electronics is to be amongst the first groups in Europe and the world to develop these devices, and to push the boundaries of what has been achieved in this fledgling field to date. Once a quality benchmarked ~15 kV SiC IGBT process is developed as the first milestone in this project, the process will be modified to explore areas not to-date explored, including the development of lower voltage (5-10 kV) SiC IGBTs benchmarked to SiC MOSFETs, trench SiC IGBTs, and novel topologies such as hybrid SiC MOSFET-IGBTs. The consortium will all work together towards these ambitious goals, with the work packages split by expertise (materials development, simulation, fabrication and testing) to cut across each of the objectives
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Added to Database
01/03/19