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Reference Number EP/N028201/1
Title Border Patrol: Improving Smart Device Security through Type-Aware Systems Design
Status Started
Energy Categories OTHER POWER and STORAGE TECHNOLOGIES(Electric power conversion) 5%;
OTHER POWER and STORAGE TECHNOLOGIES(Electricity transmission and distribution) 5%;
OTHER CROSS-CUTTING TECHNOLOGIES or RESEARCH(Environmental, social and economic impacts) 5%;
Research Types Basic and strategic applied research 50%;
Applied Research and Development 50%;
Science and Technology Fields PHYSICAL SCIENCES AND MATHEMATICS (Computer Science and Informatics) 100%
UKERC Cross Cutting Characterisation Not Cross-cutting 100%
Principal Investigator Dr W Vanderbauwhede
No email address given
School of Computing Science
University of Glasgow
Award Type Standard
Funding Source EPSRC
Start Date 01 February 2017
End Date 31 July 2023
Duration 78 months
Total Grant Value £1,765,760
Industrial Sectors Electronics; Information Technologies
Region Scotland
Programme GU : Global Uncertainty
Investigators Principal Investigator Dr W Vanderbauwhede , School of Computing Science, University of Glasgow (99.996%)
  Other Investigator Dr C Fensch , Sch of Mathematical and Computer Science, Heriot-Watt University (0.001%)
Professor S Scholz , Sch of Mathematical and Computer Science, Heriot-Watt University (0.001%)
Dr R Stewart , Sch of Mathematical and Computer Science, Heriot-Watt University (0.001%)
Professor N Yoshida , Computing, Imperial College London (0.001%)
  Industrial Collaborator Project Contact , EDF Energy (0.000%)
Project Contact , ABB Limited (0.000%)
Project Contact , Xilinx Ireland (0.000%)
Web Site
Abstract There are increasing concerns about the safety and security of critical infrastructure such as nuclear power plants, the electricity grid and other utilities in the face of possible cyber attacks. As ageing controllers are replaced by smart devices based on Field-Programmable Gate Arrays (FPGAs) and embedded microprocessors, the safety of such devices raises many concerns. In particular, there is the very real risk of malicious functionality hidden in the silicon or in software binaries, dormant and waiting to be activated. Currenthardware and software systems are of such complexity that it is impossible to discover such malicious code through testing.We aim to address this problem by closely connecting the system design specification with the actual implementation through the use of a formal design methodology based on type systems with static and dynamic type checking. The type system will be used as a formal language to encode the design specification so that the actual implementation will automatically be checked against the specification.Static type checking of data types and multiparty session types can ensure the correctness of the interaction between the components. However, as static checking assume full access to the design source code it cannot be used to protect against potential threads issuing from third-party functional blocks (know as ``Intellectual Property Cores'' or IP cores) that are commonly used in hardware design:the provider of the IP core can claim adherence to the types and protocols, so that the IP core will meet the compile-time requirements, but the run-time the behaviour cannot be controlled using static techniques. The same applies to third-party compiled software libraries.Therefore we propose to use run-time checking of data types as well as session types at the boundaries of untrusted modules ("Border Patrol"), so that any intentional or unintentional breach of the specification will safely be intercepted
Publications (none)
Final Report (none)
Added to Database 21/07/17