Projects
Projects: Projects for Investigator |
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| Reference Number | EP/V028251/1 | |
| Title | DART: Design Accelerators by Regulating Transformations | |
| Status | Completed | |
| Energy Categories | Energy Efficiency(Other) 20%; Not Energy Related 80%; |
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| Research Types | Basic and strategic applied research 100% | |
| Science and Technology Fields | PHYSICAL SCIENCES AND MATHEMATICS (Computer Science and Informatics) 100% | |
| UKERC Cross Cutting Characterisation | Not Cross-cutting 100% | |
| Principal Investigator |
Professor W Luk Computing Imperial College London |
|
| Award Type | Standard | |
| Funding Source | EPSRC | |
| Start Date | 01 October 2021 | |
| End Date | 30 September 2024 | |
| Duration | 36 months | |
| Total Grant Value | £613,910 | |
| Industrial Sectors | Info. & commun. Technol. | |
| Region | London | |
| Programme | NC : ICT | |
| Investigators | Principal Investigator | Professor W Luk , Computing, Imperial College London |
| Industrial Collaborator | Project Contact , Maxeler Technologies Ltd Project Contact , Tianjin University, China Project Contact , Intel Corporation (UK) Ltd Project Contact , Corerain Technologies Project Contact , Stanford University, USA Project Contact , Cornell University, USA Project Contact , University of British Columbia Project Contact , Dunnhumby Project Contact , Microsoft Research Ltd Project Contact , Deloitte LLP Project Contact , Xilinx Ireland Project Contact , RIKEN |
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| Web Site | ||
| Objectives | ||
| Abstract | The DART project aims to pioneer a ground-breaking capability to enhance the performance and energy efficiency of reconfigurable hardware accelerators for next-generation computing systems. This capability will be achieved by a novel foundation for a transformation engine based on heterogeneous graphs for design optimisation and diagnosis. While hardware designers are familiar with transformations by Boolean algebra, the proposed research promotes a design-by-transformation style by providing, for the first time, tools which facilitate experimentation with design transformations and their regulation by meta-programming. These tools will cover design space exploration based on machine learning, and end-to-end tool chains mapping designs captured in multiple source languages to heterogeneous reconfigurable devices targeting cloud computing, Internet-of-Things and supercomputing. The proposed approach will be evaluated through a variety of benchmarks involving hardware acceleration, and through codifying strategies for automating the search of neural architectures for hardware implementation with both high accuracy and high efficiency | |
| Data | No related datasets |
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| Projects | No related projects |
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| Publications | No related publications |
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| Added to Database | 15/11/21 | |
